UVM-OVM: Yet another compare issue…

Hi guys, recently we discovered one more bug in UVM and OVM build in compare methods. Previously, I discussed about UVM-OVM: Compare method bugs which was about associative array, this post is related to different object types.

Recently the committee has reported/resolved one more bug in UVM/OVM built-in compare method. Note that the following applies to all the UVM and OVM based simulations.

Basically the uvm_comparer checks two objects for type mismatch using the return from get_type_name(). But `uvm_object_param_utils does not implement get_type_name(). So a compare between two objects of the same parameterized class but different parameter values sees a matching get_type_name() returned from the base type of the two objects and declares a match, even if the contents are also different.

Attaching the sample code where two objects of different parameters are randomized with different values and the compare method passes vacuously.

Mantis #6699. UVM committee has recently proposed a fix for using a function hook up in upcoming releases of UVM 1800.2.2017. Till then users needs to write do_compare hook-up for this as a workaround.

Sample code:

module top;
import uvm_pkg::*;
`include “uvm_macros.svh”

class pkt#(WIDTH) extends uvm_object;
rand bit[WIDTH:0] data;
`uvm_object_param_utils_begin(pkt#(WIDTH))
`uvm_field_int(data, UVM_DEFAULT)
`uvm_object_utils_end

function new(string name=”pkt#(WIDTH)”);
super.new(name);
endfunction

function void post_randomize();
uvm_report_info(get_name(),$sformatf(“data randomized = %0d”,data),UVM_LOW);
endfunction

endclass

class test extends uvm_component;
`uvm_component_utils(test)
function new(string name, uvm_component parent);
super.new(name,parent);
endfunction

task run_phase(uvm_phase phase);
pkt#(8) d1;
pkt#(9) d2;
d1 = new(“d1”);
d2 = new(“d2”);

void'(d1.randomize());
void'(d2.randomize());

if(d1.compare(d2)) begin // compare returns 1 if comparison is success
uvm_report_error(“FAILURE”, “**** UVM TEST FAILED (objects compared as equal even when they are of different parameters) ****”);
return;
end
uvm_report_info(“SUCCESS”, “**** UVM TEST PASSED ****”, UVM_NONE);
endtask
endclass

initial run_test(“test”);
endmodule

// vcs -sverilog compare.sv -ntb_opts uvm -R
// Output:
// UVM_INFO @ 0: reporter [d1] data randomized = 190
// UVM_INFO @ 0: reporter [d2] data randomized = 252
// UVM_ERROR @ 0: uvm_test_top [FAILURE] **** UVM TEST FAILED (objects compared as equal eventhough they are of different type) ****

Hope that this post helped in saving your future debug time. Feel free to post any queries in comments section. 🙂

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